thnks bro

error message saying d3dx9_26.dl and R3000 debugger manual?

DirectX 9.0c installed but not the D3DX dlls so will get errors about missing d3dx9_24.dll, d3dx9_25.dll, d3dx9_26.dll, d3dx9_27.dll, d3dx9_28.dll, d3dx9_29.dll,d3dx9_30.dll,d3dx9_31.dll and d3dx9_32.dll. In addition XINPUT dlls may be missing (this is the Xbox controller system).

these installers will not install DirectX 9.0c, they will only install the missing dlls from the SDK updates. Most people should have DirectX 9.0c as part of Windows XP SP2

Note: if you are missing d3dx9d_xx.dll files e.g. d3dx9d_29.dll these files are debug versions of the libraries for development purposes only. Nobody should be distributing these in an application.

To use these you need the full DirectX SDK.

Introduction
--------------------------------------------------------------------------
This text covers the usage of the R3000, the system control coprocessor and
hardware registers, the file server and some system calls.

--------------------------------------------------------------------------
R3000
--------------------------------------------------------------------------
The heart of the psx is a MIPS R3000. The version in the PSX has two
coproccors, (cop0 - System Control Coproccessor, cop2 - GTE), one
multiplier/divider, 32 general registers, one ALU, one shifter, one
address adder, 4kb of Instuction Cache, 1 kb of Data cache and NO floating
point unit.

Registers
-------------------------------------------------------------
All registers are 32 bits wide.

0      zero    Constant, always 0
1      at      Assembler temporary.
2- 3    v0-v1    Subroutine return values
4- 7    a0-a3    Subroutine arguments
8-15    t0-t7    Temporaries, may be changed by subroutines
16-23    s0-s7    Register variables, must be saved by subs.
24-25    t8-t9    Temporaries, may be changed by subroutines
26-27    k0-k1    Reserved for the kernel
28      gp      Global pointer
29      sp      Stack pointer
30      fp(s8)  9th register variable, subs can use this as a frame
                  pointer
31      ra      Return address

-      pc      Program counter
-      hi,lo    Registers of the multiplier/divider.

All registers behave the same, remarks are not hardware bound, but general
programming good practice. Respect these for compatability, especially if
you intend to use kernel routines.
Exceptions are register 0, and 31. Zero will always return 0, regardless
of any writing attempts. Ra is used by the normal jal instruction for the
return address. (points to the second instruction after the jal). Note that
the jalr instruction can use any register for the return address, though
usually only register 31 is used.

The PC is not really a register, and should not be seen like one. Hi, Lo
are the registers which the multiplier/divider returns its results to.
Special instructions are implemented to deal with them.

-------------------------------------------------------------
Instructions
-------------------------------------------------------------
rt      target register (cpu general register 0-31)
rs      source register (cpu general register 0-31)
rd      destination register (cpu general register 0-31)
base    base register (cpu general register 0-31)
imm      16 bit immediate
b?      immediate value of ? bits wide.
c0r      Coprocessor 0 register
c2d      Coprocessor 2 (GTE) data register
c2c      Coprocessor 2 (GTE) control register

imm(base) means an address of the value in the register + the immediate
        value.

inst    instruction name.
d        number of instructions to wait before using r1 (target reg).
args    format of the operand fields.
desc.    description of the instruction.

inst  d  args        desc.

*Load/Store instructions

lb    1  rt,imm(base)  loads lowest byte of rt with addressed byte and
                      extends sign.
lbu  1  rt,imm(base)  loads lowest byte of rt with addressed byte.
lh    1  rt,imm(base)  loads lowest halfword of rt with addressed halfword
                        and extends sign.
lhu  1  rt,imm(base)  loads lowest halfword of rt with addressed halfword.
lw    1  rt,imm(base)  loads r1 with addressed word.
lwl  0  rt,imm(base)  loads high order byte of rt with addressed byte and
                      then loads up to the low order word boundary into rt.
lwr  0  rt,imm(base)  loads low order byte of rt with addressed byte and
                      then loads up to the high order word boundary into
                      rt.

                      There's no delay for lwl and lwr, so you can use them
                      directly following eachother. fe. to load a word
                      anywhere in memory without regard to alignment:
                      lwl  a0,$0003(t0)
                      lwr  a0,$0000(t0)

sb    1  rt,imm(base)  stores lowest byte of rt in addressed byte.
sh    1  rt,imm(base)  stores lowest halfword of rt in addressed halfword.
sw    1  rt,imm(base)  stores rt in addressed word.
swl  0  rt,imm(base)  unaligned store, see lwl
swr  0  rt,imm(base)  unaligned store, see lwr

lui  0  rt,imm        loads rt with immediate<<$10

*arithmic instructions

When an arithmic overflow occurs, rd will not be modified.

add  0  rd,rs,rt      Adds rt to rs and stores the result in rd.
addu  0  rd,rs,rt      Adds rt to rs, ignores arithmic overflow and stores
                      result in rd.
sub  0  rd,rs,rt      Substracts rt from rs and stores result in rd.
subu  0  rd,rs,rt      Substracts rt from rs, ignores arithmic overflow and
                      stores result in rd.

addi  0  rd,rs,imm    Adds signextended immediate to rs, and stores the
                      result in rd.
addiu 0  rd,rs,imm    Adds signextended immediate to rs, ignores arithmic
                      overflow and stores the result in rd.

subi  0  rd,rs,imm    Substracts signextended immediate from rs and stores
                      the result in rd.
subiu 0  rd,rs,imm    Substracts signextended immediate from rs, ignores
                      arithmic overflow, and stores the result in rd.

mult    rs,rt        Multiplies rs with rt, and stores the 64 bit sign
                      extended result in hi/lo.
multu    rs,rt        Multiplies rs with rt, and stores the 64 bit result
                      in hi/lo.
div      rs,rt        Divides rs by rt, and stores the quotient into lo,
                      and the remainder into high. Results are sign
                      extended.
divu    rs,rt        Divides rs by rt, and stores the quotient into lo,
                      and the remainder into high.

*logical instructions

and  0  rd,rs,rt      Performs a bit wise AND between rs and rt, and
                      stores the result in rd.
or    0  rd,rs,rt      Performs a bit wise OR between rs and rt, and
                      stores the result in rd.
xor  0  rd,rs,rt      Performs a bit wise XOR between rs and rt, and
                      stores the result in rd.
nor  0  rd,rs,rt      Performs a bit wise NOR between rs and rt, and
                      stores the result in rd.

andi  0  rd,rs,imm    Performs a bit wise AND between rs and unsigned
                      immediate and stores the result in rd.
ori  0  rd,rs,imm    Performs a bit wise OR between rs and unsigned
                      immediate and stores the result in rd.
xori  0  rd,rs,imm    Performs a bit wise XOR between rs and unsigned
                      immediate and stores the result in rd.

*shifting instructions

sllv  0  rd,rs,rt      Shifts rs rt bits to the left and stores the result
                      in rd.
srlv  0  rd,rs,rt      Shifts rs rt bits to the right and stores the result
                      in rd.
srav  0  rd,rs,rt      Shifts the value in rs rt bits to the right,
                      preserving sign, and stores the value in rd.

sll  0  rd,rs,b5      Shifts rs b5 bits to the left and stores the result
                      in rd.
srl  0  rd,rs,b5      Shifts rs b5 bits to the right and stores the result
                      in rd.
sra  0  rd,rs,b5      Shifts rs b5 bits to the right, preserving sign and
                      stores the result in rd.

*comparison instructions.

slt  0  rd,rs,rt      rd=1 if rs < rt, else rd = 0
sltu  0  rd,rs,rt      rd=1 if (unsigned)rs <(unsigned)rt, else rd = 0

slti  0  rd,rs,imm    rd=1 if rs < imm, else rd = 0
sltiu 0  rd,rs,imm    rd=1 if (unsigned)rs 0
bltz    rs,imm        branches to imm if rs < 0
blez    rs,imm        branches to imm if rs = 0
bltzal  rs,imm        branches to imm and stores pc+8 into RA if rs = 0

*system instructions

mfhi  2 rd            moves HI into rd
mflo  2 rd            moves LO into rd
mthi  2 rs            moves rs into HI
mtlo  2 rs            moves rs into LO

mtc0  2 rs,c0r        moves rs into cop0 register c0r
mfc0  2 rd,c0r        moves cop0 register c0r into rd

mtc2  2 rs,c2d        moves rs into cop2 data register c2d
mfc2  2 rd,c2d        moves cop2 data register c2d into rd

ctc2  2 rs,c2c        moves rs into cop2 control register c2d
cfc2  2 rd,c2c        moves cop2 control register c2d into rd

lwc2  1 c2d,imm(base) load cop2 data register with addressed word
swc2  1 c2d,imm(base) stores cop2 data register at addressed word

syscall  (b20)        generates a system call exception
break    (b20)        generates a breakpoint exception
                      the 20bits wide code field is not passed, but
                      must be read from the instuction itself if you
                      want to use it.

cop2    b25          Coprocessor operation is started. b25 is
                      passed as parameter.

rfe                    restores the interrupt enable and kernel
                      previlege bits.

tlb instructions      see MIPS doc.

Searches for the first file to match the name in the string
pointed to by a0. Wildcards (?, *) may be used. Start the name
with the device you want to address. (ie. pcdrv:) Different
drives can be accessed as normally by their drive names (a:, c:)
if path is omitted after the device, the current directory will
be used.

A direntry structure looks like this:

$00 - $13    db  Filename, terminated with 0.
$14          dw  File attribute
$18          dw  File size
$1c          dw  Pointer to next direntry
$20 - $27    db  Reserved by system
-------------------------------------------------------------
nextfile          Searches for the next file to match the name.
B0 call $43
in:      a0      Pointer to direntry structure
out:    v0      0 if unsuccesful, else same as a0.

Uses the settings of a previous firstfile command.
-------------------------------------------------------------
rename            Rename a file on target device.
B0 call $44
in:      a0      Pointer to old file name
        a1      Pointer to new file name
out:    v0      1 if successful, 0 if failed.
-------------------------------------------------------------
delete            Delete a file on target device.
B0 call $45
in:      a0      Pointer to file name
out:    v0      1 if successful, 0 if failed.
-------------------------------------------------------------

Event Classes

The upper byte of each event type, is a descriptor byte, which
identifies the type of event to kernal routines.

Descriptors:
$ff    Thread
$f0    Hardware
$f1    Event
$f2    Root counter
$f3    User event
$f4    BIOS

Hardware events:
$f0000001    VBLANK
$f0000002    GPU
$f0000003    CDROM Decoder
$f0000004    DMA controller
$f0000005    RTC0
$f0000006    RTC1
$f0000007    RTC2
$f0000008    Controller
$f0000009    SPU
$f000000a    PIO
$f000000b    SIO
$f0000010    Exception
$f0000011    memory card
$f0000012    memory card
$f0000013    memory card

Root counter events:
$f2000000    counter 0 (pixel clock)
$f2000001    counter 1 (horizontal retrace)
$f2000002    counter 2 (one-eighth of system clock)
$f2000003    counter 3 (vertical retrace)

Bios events:
$f4000001    memory card
$f4000002    libmath

Event Specs:
$0001    counter becomes zero
$0002    interrupted
$0004    end of i/o
$0008    file was closed
$0010    command acknowledged
$0020    command completed
$0040    data ready
$0080    data end
$0100    time out
$0200    unknown command
$0400    end of read buffer
$0800    end of write buffer
$1000    general interrupt
$2000    new device
$4000    system call instruction
$8000    error happned
$8001    previous write error happned
$0301    domain error in libmath
$0302    range error in libmath

Event modes:
$1000    Handle on interrupt
$2000    Do not handle on interrupt.

Quick step-by-step:

To set up an interrupt using these counters you can do the following:
1 - Reset the counter. (Mode = 0)
2 - Set its target value, set mode.
3 - Enable corresponding bit in the interrupt mask register ($1f801074)
    bit 3 = Counter 3 (Vblank)
    bit 4 = Counter 0 (System clock)
    bit 5 = Counter 1 (Hor retrace)
    bit 6 = Counter 2 (Pixel)
4 - Open an event. (Openevent bios call - $b0, $08)
    With following arguments:
a0-Rootcounter event descriptor or'd with the counter number.
    ($f2000000 - counter 0, $f2000001 - counter 1,$f2000002 - counter 2,
    $f2000003 - counter 3)
a1-Spec = $0002 - interrupt event.
a2-Mode = Interrupt handling ($1000)
a3-Pointer to your routine to be excuted.
    The return value in V0 is the event identifier.

5 - Enable the event, with the corresponding bioscall ($b0,$0c) with
    the identifier as argument.

6 - Make sure interrupts are enabled. (Bit 0 and bit 10 of the COP0 status
    register must be set.)

Your handler just has to restore the registers it uses, and it should
terminate with a normal jr ra.

To turn off the interrupt, first call disable event ($b0, $0d) and then
close it using the Close event call ($b0,$09) both with the event number
as argument.

Example:

-------------------------------------------------------------

Event Classes

The upper byte of each event type, is a descriptor byte, which
identifies the type of event to kernal routines.

Descriptors:
$ff    Thread
$f0    Hardware
$f1    Event
$f2    Root counter
$f3    User event
$f4    BIOS

Hardware events:
$f0000001    VBLANK
$f0000002    GPU
$f0000003    CDROM Decoder
$f0000004    DMA controller
$f0000005    RTC0
$f0000006    RTC1
$f0000007    RTC2
$f0000008    Controller
$f0000009    SPU
$f000000a    PIO
$f000000b    SIO
$f0000010    Exception
$f0000011    memory card
$f0000012    memory card
$f0000013    memory card

Root counter events:
$f2000000    counter 0 (pixel clock)
$f2000001    counter 1 (horizontal retrace)
$f2000002    counter 2 (one-eighth of system clock)
$f2000003    counter 3 (vertical retrace)

Bios events:
$f4000001    memory card
$f4000002    libmath

Event Specs:
$0001    counter becomes zero
$0002    interrupted
$0004    end of i/o
$0008    file was closed
$0010    command acknowledged
$0020    command completed
$0040    data ready
$0080    data end
$0100    time out
$0200    unknown command
$0400    end of read buffer
$0800    end of write buffer
$1000    general interrupt
$2000    new device
$4000    system call instruction
$8000    error happned
$8001    previous write error happned
$0301    domain error in libmath
$0302    range error in libmath

Event modes:
$1000    Handle on interrupt
$2000    Do not handle on interrupt.

--------------------------------------------------------------------------
Root Counters
--------------------------------------------------------------------------
There are 4 root counters.

Counter  Base address      Synced to
0        $1f801100        pixelclock
1        $1f801110        horizontal retrace
2        $1f801120        1/8 system clock
3                          vertical retrace

Each have three registers, one with the current value, one with the counter
mode, and one with a target value.

DICR    Dma interrupt register    $1f8010f4

-------------------------------------------------------------
The DMA channel registers are located starting at $1f801080. The
base adress for each channel is:
$1f801080 DMA channel 0  MDECin
$1f801090 DMA channel 1  MDECout
$1f8010a0 DMA channel 2  GPU (lists + image data)
$1f8010b0 DMA channel 3  CDrom
$1f8010c0 DMA channel 4  SPU
$1f8010d0 DMA channel 5  PIO
$1f8010e0 DMA channel 6  OTC (reverse clear OT)

As for Mortal Kombat Trilogy,
it still won't run and freezes at the dragon logo.
Here is the errors I get in the debugger:

CDROM: Using IoControl
pos=217721 auto=0
autopause cdda
translate_address: illegal physical address 07e0000c
translate_address: illegal physical address 07e00018
translate_address: illegal physical address 07e0000c
translate_address: illegal physical address 07e00018
translate_address: illegal physical address 07e0000c
translate_address: illegal physical address 07e00010
translate_address: illegal physical address 07e0000c
translate_address: illegal physical address 07e0000c
r3000: executed illegal opcode 00000001
r3000:  executed illegal opcode 00006da8
r3000:  executed illegal opcode f0000009
r3000:  executed illegal opcode f0000009
r3000:  executed illegal opcode f0000003
r3000:  executed illegal opcode f0000003
r3000:  executed illegal opcode f0000003
r3000:  executed illegal opcode f0000003
r3000:  executed illegal opcode f0000003
r3000:  executed illegal opcode f0000003
r3000:  executed illegal opcode f0000003
r3000:  executed illegal opcode f0000003
r3000:  executed illegal opcode f0000003
r3000:  executed illegal opcode 0000220e
r3000:  executed illegal opcode ffffffff
r3000:  executed illegal opcode ffffffff
r3000:  executed illegal opcode ffffffff
r3000:  executed illegal opcode dc822000
r3000:  executed illegal opcode 00000001
r3000:  executed illegal opcode 00000f1c
r3000:  executed illegal opcode ffffffff
r3000:  executed illegal opcode fffffffe
translate_address:  illegal physical address 07e0000c

For me, its one of the best emulator.

if you need support from development team: https://psxemulator.proboards.com/

hola una consulta , descargue un juego pero mi ePXse no lo reconoce , esta en formato o tipo "Archivo" simplemente archivo , que puedo hacer para que lo reconozca el emulador o que me recomiendan de ante mano muchas gracias saludos cordiales ..  

@koky1043 cuanto es el peso del archivo? Para confirmar si es comprimido y solucionar, deberias de RENOMBRA el archivo a (archivo.zip) y tratar de abrirlo, si te reconoce el comprimido observaras la ROM dentro de ese archivo.

normalemte para emular son archivos .bin/cue si son juegos arcade permite el formato .zip

cordial saludo,

Hola muchas Gracias por la respuesta si mira esta es la descripcion del juego

tipo de archivo : Archivo 

tamaño : 452 MB ( 474.43.328 bytes ) 

lo descarque y automáticamente quise descomprimir o extraerlo pero no pude , quise jugarlo y el emulador no lo reconoce 

que puedo hacer ? 

@koky1043 la unica opcion que veo es la siguiente.

Archivo  renombrarlo a ARCHIVO.BIN y ejecutar ese archivo con el emulador.

Sino te funciona no es ninguna juego  

Hola y como podría renombrarlo ? Me podrías indicar porfavor...

@koky1043 

Amigo eres un genio , si funciona, ahora si lo lee el emulador muchas gracias eh aprendido algo nuevo 

amigo y para los juegos  con el formato

tipo : archivo ppf 

        archivo CHD 

@koky1043 cuando te encontres un parche con terminacion de .ppf debes de abrir el programa PPF-o-matic para parchar el archivo .bin

programa PPF-O-Matic: Programa, Tutorial en Ingles y Español

https://winningeleven-games.com/wordpress/programas-de-edicion-playstation/ppf-o-matic/

ISO FILE: Abrimos la ISO/BIN Imagen Limpia donde vamos aplicar el parche 

Aqui donde puedo encontrar la iso limpia ?

ya pude lograrlo ya entendi lo de la iso limpia , pero aun no puedo resolver el tema de los juegos en formato tipo : archivo CHD 

que me recomiendas   ?